Search found 10 matches
- Sat Nov 13, 2010 3:18 am
- Forum: ROMS Problems
- Topic: ROMS not running on 1024 cores for 17532 iterations
- Replies: 12
- Views: 14300
Re: ROMS not running on 1024 cores for 17532 iterations
well it looks as if you're having trouble creating your history file - does it work fine for less processor cores? Are you using parallel NetCDF output? In any case, your benchmark numbers so far show that you're spending (even for this number of timesteps) an inordinate amount of time for ...
- Mon Sep 27, 2010 11:45 am
- Forum: ROMS Problems
- Topic: Intel’s new i7 980x CPU gives disappointing speedup
- Replies: 48
- Views: 113692
Re: Intel’s new i7 980x CPU gives disappointing speedup
Furthermore, to my experience, the i7-family CPUs machines (by at least a factor of 2) outperform all previous generations of CPUs, including Core 2 and 5400-series Xeons (that is ROMS running 8 theads on a Core i7 920 is faster than on 8 threads dual-quad Xeon 5420s). This is a statement that ...
- Fri Apr 30, 2010 2:37 pm
- Forum: ROMS Discussion
- Topic: does parallel IO work with pnetcdf?
- Replies: 5
- Views: 3930
Re: does parallel IO work with pnetcdf?
I have not examined the NetCDF 4.1.1 library. As far as I know, UNIDATA NetCDF does not support neither distribute the pnetcdf library. NetCDF 4.1.1 allows pnetcdf to be used when using the classic v3 mode - the configure script has a --with-pnetcdf= option - UNIDATA does not distribute the pnetcdf ...
- Tue Jun 30, 2009 2:46 pm
- Forum: ROMS Tools and Techniques
- Topic: Issues with installing OCTANT on Linux x64
- Replies: 6
- Views: 5778
Re: Issues with installing OCTANT on Linux x64
More generally speaking this error is due to a mixing of PIC and non-PIC objects when the target executable is expected to have more than 2GB of address space extent. It is a "feature" of AMD64/EM64T that AMD introduced by employing 4 different 64bit addressing models (kernel, small (default ...
- Tue Feb 19, 2008 3:33 am
- Forum: ROMS Discussion
- Topic: Sorting routine in MPI & adding new CFL routine to ROMS
- Replies: 2
- Views: 3554
Re: Sorting routine in MPI & adding new CFL routine to R
(2) Find its maximum and then its corresponding U-, V- and W- components, (3) From (2) find the (I,J,K) grid locations as to where this maximum CFL occurs and, [snip] I do not know how to code up (1)-(4) in MPI code because of steps (2) and (3) where we need to do some sorting to find the ...
- Wed Nov 28, 2007 6:08 pm
- Forum: ROMS Discussion
- Topic: Query: GPU Offload "Math Co-Processor" with ROMS ?
- Replies: 3
- Views: 5054
My boss is looking to get such a test system to play with. He says they are good at single precision floating point, but double precision is not so fast. I think the people who would get the easiest benefit are using libraries such as lapack where you just change your function calls or the library ...
- Mon Dec 05, 2005 3:39 pm
- Forum: ROMS Benchmarks
- Topic: Benchmarks
- Replies: 31
- Views: 83399
It is strange but true that on Intel x86-family CPUs a serial run will normally go faster if there are multiple tiles. Actually one would expect this type of behaviour on all cache-based processors (possibly including cache-based vector processors like the later Cray ones - though things could be ...
- Fri Sep 23, 2005 6:45 pm
- Forum: ROMS Problems
- Topic: oceanS on SGI
- Replies: 5
- Views: 6012
- Mon Sep 19, 2005 2:20 pm
- Forum: ROMS Problems
- Topic: oceanS on SGI
- Replies: 5
- Views: 6012
- Mon Jan 03, 2005 9:48 pm
- Forum: ROMS Discussion
- Topic: Interconnect speed for MPI: Gigabit, Myrinet and Infiniband
- Replies: 5
- Views: 10143
I would not expect anywhere near a factor of 7 (or even of 2) performance difference (for a program spending 50% of its time communicating exclusively very large messages - a rather unlikely configuration - 7 times higher bandwidth would at best buy you 43% less wallclock time). ROMS' (as well as ...